IS42S16400-7T

  • Fully synchronous; all signals referenced to a positive clock edge

  • Internal bank for hiding row access/precharge

  • Single 3.3V power supply

  • LVTTL interface

  • Programmable burst length

    – (1, 2, 4, 8, full page)

  • Programmable burst sequence: Sequential/Interleave

  • Self refresh modes

  • 4096 refresh cycles every 64 ms

  • Random column address every clock cycle

  • Programmable CAS latency (2, 3 clocks)

  • Burst read/write and burst read/single write operations capability

  • Burst termination by burst stop and precharge command

  • Byte controlled by LDQM and UDQM

  • Package: 400-mil 54-pin TSOP II

  • Power Down and Deep Power Down Mode

  • Partial Array Self Refresh

  • Temperature Compensated Self Refresh

  • Output Driver Strength Selection (Please contact Product Manager for mobile function detail)